Support for architectures with non-8-bit memory cells (like TMS320)

[p-kraszewski]

Some architectures use memory cells of more than 8 bits. One I'm tackling with is TMS320, where every memory access is in 16-bit words and there's no concept of "byte". One effect is that memory offsets in BN are "wrong", counting twice as fast:

How BN sees it:

0000: 12 34
0002: 56 78

How CPU sees it:

0000: 3412   ; Usually when dumping FLASH, words are recorded little-endian, like in SATA
0001: 7856

While disassembler can lie (eg, multiply jump addresses by 2 to map words->bytes), vector- and jump-tables are out of luck (perhaps "display as pointer" should do the cheating).

There's an experimental plugin (bn-tic28x-arch), but it suffers heavily from the issue.

So my question is: does Binary Ninja support such architectures or plan to do so?