From 3f5aed7e40b54300c79d0670514e452727563ed1 Mon Sep 17 00:00:00 2001 From: zhangyan <1422953826@qq.com> Date: Mon, 2 Sep 2024 19:11:55 +0800 Subject: [PATCH 1/3] modify atomic_aarch64 --- libcpu/aarch64/common/atomic_aarch64.c | 28 +++++++++++++++----------- 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/libcpu/aarch64/common/atomic_aarch64.c b/libcpu/aarch64/common/atomic_aarch64.c index 4b329516133..9ea2896fe39 100644 --- a/libcpu/aarch64/common/atomic_aarch64.c +++ b/libcpu/aarch64/common/atomic_aarch64.c @@ -90,19 +90,23 @@ rt_atomic_t rt_hw_atomic_flag_test_and_set(volatile rt_atomic_t *ptr) rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_atomic_t *old, rt_atomic_t new) { rt_atomic_t tmp, oldval; - __asm__ volatile ( - " prfm pstl1strm, %2\n" - "1: ldxr %0, %2\n" - " eor %1, %0, %3\n" - " cbnz %1, 2f\n" - " stlxr %w1, %4, %2\n" - " cbnz %w1, 1b\n" - " dmb ish\n" - "2:" + " prfm pstl1strm, %2\n" + "1: ldxr %0, %2\n" + " eor %1, %0, %3\n" + " cbnz %1, 2f\n" + " stlxr %w1, %4, %2\n" + " cbnz %w1, 1b\n" + " dmb ish\n" + " mov %w1, #1\n" + " b 3f\n" + "2: str %0, [%5]\n" + " mov %w1, #0\n" + "3:" : "=&r" (oldval), "=&r" (tmp), "+Q" (*ptr) - : "Kr" (*old), "r" (new) + : "Kr" (*old), "r" (new), "r" (old) : "memory"); - - return oldval == *old; + + return tmp; } + From b61514ce6070544ee91cc38ed2dce620afefe634 Mon Sep 17 00:00:00 2001 From: zhangyan <1422953826@qq.com> Date: Tue, 3 Sep 2024 19:01:28 +0800 Subject: [PATCH 2/3] format modify --- libcpu/aarch64/common/atomic_aarch64.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/libcpu/aarch64/common/atomic_aarch64.c b/libcpu/aarch64/common/atomic_aarch64.c index 9ea2896fe39..6a4374e9493 100644 --- a/libcpu/aarch64/common/atomic_aarch64.c +++ b/libcpu/aarch64/common/atomic_aarch64.c @@ -91,22 +91,22 @@ rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_a { rt_atomic_t tmp, oldval; __asm__ volatile ( - " prfm pstl1strm, %2\n" - "1: ldxr %0, %2\n" - " eor %1, %0, %3\n" - " cbnz %1, 2f\n" - " stlxr %w1, %4, %2\n" - " cbnz %w1, 1b\n" - " dmb ish\n" - " mov %w1, #1\n" + " prfm pstl1strm, %2\n" + "1: ldxr %0, %2\n" + " eor %1, %0, %3\n" + " cbnz %1, 2f\n" + " stlxr %w1, %4, %2\n" + " cbnz %w1, 1b\n" + " dmb ish\n" + " mov %w1, #1\n" " b 3f\n" "2: str %0, [%5]\n" - " mov %w1, #0\n" + " mov %w1, #0\n" "3:" : "=&r" (oldval), "=&r" (tmp), "+Q" (*ptr) : "Kr" (*old), "r" (new), "r" (old) : "memory"); - + return tmp; } From cc8e60cfc922ef01da7a965b5b7c150c34629e1d Mon Sep 17 00:00:00 2001 From: zhangyan <1422953826@qq.com> Date: Tue, 3 Sep 2024 19:04:47 +0800 Subject: [PATCH 3/3] format modify --- libcpu/aarch64/common/atomic_aarch64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libcpu/aarch64/common/atomic_aarch64.c b/libcpu/aarch64/common/atomic_aarch64.c index 6a4374e9493..35dd2b03998 100644 --- a/libcpu/aarch64/common/atomic_aarch64.c +++ b/libcpu/aarch64/common/atomic_aarch64.c @@ -106,7 +106,7 @@ rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_a : "=&r" (oldval), "=&r" (tmp), "+Q" (*ptr) : "Kr" (*old), "r" (new), "r" (old) : "memory"); - + return tmp; }